Headline, November14, 2013

''' COMPUTER CORONATION '''

In the immediate future, just a whisper away, the phase change memory will dethrone flash and lead to a radical shift in computer design:

This involves careful control of the length of the energy pulse that creates an amorphous region in the memory cell. A shorter pulse creates a smaller amorphous region. The smaller the region, the lower the electrical resistance of the cell.

It is therefore possible to get a single cell to store multiple bits. Precisely how many remains to be seen. The IBM researchers have built PCM memory chips with 16  states or -four bits per cell,  and David Wright, a data-storage researcher at the University of Exeter, has built individual PCM memory cells with 512 states or nine bits per cell. 

But the larger the number of states, the more difficult it becomes to differentiate between them, and the higher the sensitivity of the equipment required to detect them, he says.

There is also the problem of the drift. This is where the resistance of a cell changes gradually in the days and weeks after its state has been updated. For a single-bit cell this is not a problem, because the difference in resistance between its possible two states is large, so a small variation does not really matter.

But for multi-level cells drift can eventually cause errors. To make matters worse, the amount of drift is non-linear and depends on how large the amorphous region is. But the IBM researchers think they have hit upon a solution, by modifying the way cells are written to and read from.

When writing a value into a cell, the cell's resistance is measured after the energy pulse is applied, and more pulses are applied if necessary to ensure that the final resistance is set appropriately to the proper value. Even in the worst case scenario in which multiple pulses are needed, writing to the PCM memory is still  100  times faster than writing to flash. 

In addition, the IBM researchers devised a ''drift tolerant'' method to read the value in a cell, by reading multiple cells simultaneously and comparing their relative values to determine the state of each one. They have also developed a way to measure the thickness of amorphous region more accurately by analysing  its electrical properties when a known current is passe through it.

Drift causes the resistance of a cell to change, but not the thickness of the amorphous region, so this provides a more robust way to measure the cell's state. IBM is now working with SK Hynix to bring multi-level PCM based memory chips to the market. The aim is to create a form of memory capable of bridging the gap flash and random access memory. A category it calls ''storage class memory''.

This in turn opens the door to  ''new computer architecture'' in which information does not have to be shuffled from relatively low storage devices to much faster working memory.

Such architectures would be capable of crunching huge amounts of information, such as the data that will be gathered by the Square Kilometre Array Telescope, far more efficiently than existing machines. So flash will get dethroned, And it will lead to radical shift in computer design.

And it will set the design trajectory on an highly innovative phase. For sure, a phase change on a much much larger scale.

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